Distinguished Engineer

Job Description

We’re Hiring | Distinguished Engineer – Digital Design

📍 Location: Bangalore
🏢 Company: Leading Top 40 Semiconductor Organization
👨‍💼 Experience: 18+ Years (Senior / Leadership Level)

🌟 About the Role

We are seeking a highly experienced Digital Design Engineer with deep expertise in high-performance controllers, micro-architecture, RTL design, and IP integration.

This is a leadership role contributing to cutting-edge semiconductor and connectivity solutions at advanced technology nodes (≤16nm).

💼 Key Responsibilities
Design and implement high-performance digital solutions (RTL, synthesis)
Lead micro-architecture development and full-chip design
Collaborate on IP integration (processor cores and peripherals)
Work on boot processes and firmware-aware hardware design
Own designs from architecture to GDS (full chip lifecycle)
Ensure timing closure and verification completeness
Drive pre-silicon and post-silicon validation & debug
Utilize Synopsys / Cadence tools and UVM verification methodologies
✅ Basic Qualifications
Bachelor’s in Electronics / Electrical Engineering (Master’s preferred)
18+ years of digital design experience
8+ years in processor, peripherals & full-chip implementation
Strong expertise in RTL design, synthesis, and timing closure
Experience in front-end design and gate-level simulations
🛠️ Required Expertise
Micro-architecture & RTL development for block-level and full-chip designs
Hands-on experience with processor IP (ARM / ARC)
Strong experience in PCIe (mandatory)
Peripheral implementation (I2C, SPI, UART)
Experience with DMA engines and firmware interaction
Proficiency in SystemVerilog / Verilog and scripting (Python / Perl)
Experience with advanced nodes (≤16nm)
Silicon bring-up and post-silicon debugging
Familiarity with Synopsys / Cadence tools and UVM-based verification
⭐ Preferred Skills
Experience with secure boot, authentication, and security mechanisms
Knowledge of RISC-V / ARM / ARC system-level design
Exposure to PCIe / UAL (plus)
Understanding of DFT, PAD design, and floor planning
Experience in NIC, switch, or storage product development
Familiarity with CI/CD workflows in design & verification
📩 How to Apply

📧 Email: muday_bhaskar@yahoo.com

👤 Contact: Uday – Mulya Technologies