Job Description

Job Description – SoC Architect (Chiplet-Based Systems)
Company

Mulya Technologies

Job Title

SoC Architect – Chiplet-Based Systems

Location

Bangalore / Remote (Anywhere in India)

About the Role

Mulya Technologies is seeking an experienced SoC Architect specializing in chiplet-based AI systems to define and drive the architecture of next-generation modular compute platforms.

This role focuses on architecting high-bandwidth inter-chiplet connectivity, scalable die-to-die communication protocols, and efficient partitioning of compute, memory, and I/O functionality for future AI accelerator platforms.

The ideal candidate will work closely with packaging, PHY, and interconnect teams to build scalable, power-efficient, and high-performance chiplet-based systems.

Key Responsibilities
SoC Architecture & Chiplet Design
Define SoC architecture for chiplet-based AI inference platforms.
Design:
Inter-chiplet data paths
Communication protocols
Synchronization strategies
Drive partitioning decisions across:
Compute chiplets
I/O chiplets
Memory chiplets
Control subsystems
Die-to-Die Interconnect Architecture
Define and optimize die-to-die interfaces using:
UCIe
BoW
Custom interconnect links
Specify requirements for:
Bandwidth
Latency
Power efficiency
Collaborate with packaging and PHY teams for implementation alignment.
PCIe & Memory Subsystems
Architect PCIe and DMA interfaces for host communication.
Design scalable subsystem architectures involving:
PCIe Gen 4/5
RISC-V clusters
LPDDR4/5
HBM memory interfaces
Integration & Verification
Integrate third-party IPs for:
Memory
I/O
Inter-chip communication
Support:
Multi-chip bring-up
Debug activities
Validation and verification workflows
Required Qualifications
Education
BS/MS/Ph.D. in:
Electrical Engineering
Computer Science
Related field
Experience
10–25+ years of experience in:
SoC architecture
Multi-die systems
Chiplet-based platforms
Technical Expertise
Strong hands-on experience with:
Chiplet-based system design
UCIe
EMIB
Foveros
Similar advanced packaging technologies
Architecture Knowledge
Deep understanding of:
Modular SoC partitioning
Die-to-die interconnect architectures
High-performance AI compute systems
Protocols & Interfaces
Expertise in:
PCIe Gen 4/5
DMA architectures
RISC-V subsystems
LPDDR4/5
HBM memory interfaces
Verification & Bring-Up
Familiarity with:
Chiplet-aware bring-up methodologies
System-level verification strategies
Debug frameworks
Programming & Verification
Experience with:
SystemVerilog
UVM verification methodologies
Preferred Skills
Knowledge of AI accelerator architectures
Experience with scalable interconnect fabrics
Understanding of low-latency and power-optimized communication systems
Familiarity with heterogeneous compute platforms
Key Competencies
Strong system-level architectural thinking
Excellent debugging and problem-solving abilities
Cross-functional collaboration skills
Ability to work in high-performance engineering environments
Strong communication and technical leadership skills
Employment Type
Full-Time
Remote / Hybrid flexibility available across India