Senior Analog and Mixed Signal Layout Engineer

Design
August 18, 2026
Full Time
Urgent

Job Description

Mixed-Signal Layout Engineer – ACL Digital
Location: Bangalore / Hyderabad
Qualification: B.E./B.Tech or M.E./M.Tech
Experience: Mixed-signal IC layout experience
Key requirement: TSMC 7nm / 5nm FinFET experience
Preferred additional process experience: 22FDX / 12FDX / FDSOI

Required Mixed-Signal Layout Experience:

High-speed SerDes: TX, RX, PLL, USR, LNA
ADC: SAR, Delta-Sigma, Dual-Slope, Pipeline, Flash
DAC: Weighted Resistor, R-2R Ladder
GPIO, XTAL and auxiliary cells
High-speed I/O: DDR2/DDR3/DDR4, MIPI, SATA, USB, LVDS

EDA Tools:

Cadence Virtuoso L / XL / GXL
Cadence PVS
Mentor Graphics Calibre

Best suited for: Candidates with hands-on advanced-node mixed-signal IC layout, particularly TSMC 5nm/7nm FinFET, rather than general analog or digital layout experience.

Apply: Send your updated CV to Chiranjeevi.k@acldigital.com.

Location

Related Jobs